The AC to DC converter with suitable examples and sketches are discuss here advanced. AC to DC converter is needed to read as engineer student.

## Types of AC to DC converters

- Uncontrolled converters
- Fully controlled converters
- Semi controlled converters
- Bidirectional converters

Uncontrolled converters use diodes, and these provide constant DC voltage output.

Fully controlled converters use thyristors, and these provide variable DC voltage (Variable between negative and positive two limits)

Semi controlled converters use power diodes and thyristors both these also provided variable DC voltage (variable between positive limit.

Bidirectional converters are advanced converters that use IGBT or MOSFETs These converters can transfer power in either direction and simultaneously ensure sinusoidal and more unity power factor current at AC side ensure sinusoidal and more unity power factor current at AC side.

Each above type is available in single and three phases.

## Uncontrolled converters

- Power diodes

There are two basic types

- Rectifier grade power diodes
- Fast recovery grade power diodes

Rectifier grade diodes are cheaper and used in power frequency (50 or 60hz) applications only.

Fast recovery grade diode exhibit near ideal turn off whereas rectifier grade diodes exhibit significant reverse recovery.

### Single phase converter with capacitive smoothing

Many single-phase converters are used in simple DC power supplies, with capacitor smoothing.

- During T
_{1}Capacitor is recharged - In the T
_{2}alone series load current I_{0} - During c, approximate,

I_{0 }= C(ΔV_{0}/T_{2})

I_{0 }= C(ΔV_{0}/(1/2f)) ; because generally T_{2 }>> T_{1} and there T_{2 }= 1/2f

(V_{0})_{ mean} = (V_{P} – ΔV_{0}/2) = (V_{P} – I_{0}/4fc)

V_{P} = (V_{S})_{PK} – (conduction voltage drops across 2 conducting diodes)

V_{P} = (V_{S})_{PK} – 2V_{D}

Considering charge in capacitor in steady state and assuming |I_{s}| to be near triangular,

(I_{P}T_{1}/2) = I_{0}/2f

I_{P} = I_{0}/fT_{1 }——————————-(1)

V_{P }Cos (ω t) = V_{P} – ΔV_{0}

Therefore,

## Example problem for single phase converter – AC to DC converter

An example Dc power supply with capacitor smoothing is powered by 230V, 50Hz, 1- phase Ac supply, via 18:1 step down transformer output current should be up to 1A and peak to peak ripple in output voltage should be less than 2V.

Estimate

- Mean output voltage
- Required capacitance C
- Voltage and current ratings of the required diodes

Take conduction voltage drop across a diode is 0.8V

Answer

(V_{i})_{rms} = 230V

f = 50Hz

n1: n2 = 18: 1

I_{0} = 1A, max

ΔV_{0} < 2V

V_{P} = (V_{S})_{pk }– 2V_{D}

(V_{0}) mean = 15.64

Max Voltage blocked by each diode = (Vs)pk

= 18.07V

Mean current carried by each diode = I_{0}/2

= 0.5A, max

Keeping 50% excess of safety we can select the following

Diodes: 30V, 1A (avg), 20A(pulse), Rectifier grade

Capacitor: 16V, 6000µF

## Other configuration possible – AC to DC converter

If required, we can use a suitable voltage regulator IC to remove off residual ripple of output.

If required, we can make the power supply a dual output or duct input type.

During resistive half cycle upper Vs/2 charges C1 via D1 and lower Vs/2 charges C2 via D2.

During VR half cycle, upper Vs/2 charges C2 via D2 and lower Vs/2 charges C1 via D3

For (V1) 100% choice the operation of the converter is standard operation C1 & C2 series pair is charged by full voltage Vs.

In (Vi) 50% choice during positive half cycle is charged by Vs/2 via D1 and -Vc half cycle C2 charged by Vs/2 via D2. So, C1, C2 series pair is charged at effective full voltage Vs.

Single phase converters with inductive load With inductive load as a example windings, coils, actuators etc. output current i_{0} becomes continuous if the inductiveness is greater the current will be almost constant.

Peak to peak ripple in V_{0} with record to input current i_{s} we have several measures.

- Displacement angle (Dis ang)
- Displacement factor (Dis F)
- (i
_{s}, fund)_{ rms} - (i
_{s}, total)_{ rms} - Distortion factor (DF)
- Total Harmonic Distortion (THD)
- Power factor (PF)

Dis Ang = (phase angle between V_{S} and i_{S} fund)

= 0

Dis F = Cos (Dis Angle)

= Cos (0)

= 1

## Fully controlled converters

### Single Phase bridge with inductive load (With source inductance)

Real AC sources have an internal impedance. This is basically an “internal inductance”, because internal resistance is often negligible. We denote this inductance as Ls per phase.

Full-bridge thyristor converter with inductive load, with source inductance.

Because of 𝐿𝑠, current 𝐼𝑠 at input cannot make step changes at switchover points between 𝑇1,𝑇2 and 𝑇3,𝑇4 . Current changes take time. During this brief interval of time, both the outgoing and incoming pairs of thyristors conduct simultaneously. This is called a “conduction overlap”. The phase angle width of conduction overlap is called “conduction overlap angle”.

Conduction overlap angle is denoted by 𝑢.

Waveforms of output voltage 𝑉 𝑜 , Input current 𝐼𝑠 and Converter input voltage 𝑉𝐴𝐵

During overlap, all 4 thyristors conduct simultaneously and hence 𝑉 𝑜 = 0. Let consider the overlap after triggering 𝑇1,𝑇2 pair. Using KVL,

Reduction ∆𝑉 𝑜 of mean output voltage due to conduction overlap is,

Input DisF gets deteriorated when the delay angle is increased. This is a drawback of fully-controlled thyristor converters

Supply voltage VAB at the point of common coupling (PCC) is distorted with 2 notches per cycle, occurring at angle α from zero crossing. These notches go down to zero volt, which is highly undesirable. This is another drawback of thyristor converters. Note that VAB is the input voltage for other loads connected to the PCC.

Depth of voltage notches can be reduced to an acceptable level by connecting an external inductor (Lc) at the converter input. This avoids artificial zero-crossings in the voltage waveform. Acceptable depth of notches are specified in power-quality standards.

(Depth of voltage notch with converter inductance) = (𝐿𝑠/( 𝐿𝑐 +𝐿𝑠)) X(Depth of voltage notch without converter inductance)

Ex:

A single-phase full-bridge converter is operating on 230 V, 50 Hz singlephase supply that has an internal inductance 2 mH. The converter delivers 12 A constant current at a mean voltage of 120 V DC to an inductive load. Determine,

- Operating delay angle
- Conduction overlap angle
- Input displacement-factor
- RMS value of the fundamental component of supply current
- Depth of voltage-notches at the point of common coupling (PCC)
- Required converter inductance to reduce the depth of notches down to 25% and its influence on the values found in (i) to (iv).

### 3-phase full-bridge with inductive load

The ac to dc inverter with suitable examples and sketches are discuss here advanced. ac to dc inverter is needed to read as engineer student.

Three-phase full-bridge thyristor converter with inductive load

Thyristor full-bridge operates quite similar to diode full-bridge but the turn-on points of thyristors are now delayed by angle α. For continuous load current, one thyristor from the upper-half and other from the lowerhalf must conduct at any time. Six line-line voltages at the input decide which pair should conduct at a given point of time.

Six line-line voltage waveforms at the converter input for a, b, c standard phase sequence

- Upper-half thyristors bear ODD numbers and lower-half thyristors bear EVEN numbers.
- Delay angle for a thyristor is measured from its “diode-like” conduction point.
- Triggering order of thyristors turns out to be 1, 2, 3, 4, 5, 6, 1, ……
- Consecutive trigger-points are 60° apart.
- Once triggered, a thyristor conducts for 120° span until the next thyristor in that half takes over.
- Between trigger points, two previously triggered thyristors conduct 𝐼𝑜 (they are in upper and lower halves).
- The pair that conducts at a time passes the corresponding line voltage on to 𝑉 𝑜 (eg: 𝑉 𝑜 ≡ 𝑉𝐴𝐵 when (1, 6) pair conducts).

𝐼𝑎 = 𝐼𝑜 if 𝑇1 is conducting

−𝐼𝑜 if 𝑇4 is conducting

0 otherwise

𝑉1 = 0 if 𝑇1 is conducting

𝑉𝐴𝐵 if 𝑇3 is conducting

𝑉𝐴𝐶 if 𝑇5 is conducting

Waveforms of Vo, Ia and V1 at an arbitrary delay angle α

By varying 𝛼 between 0° to 180°, we can vary 𝑉𝑜𝑚𝑒𝑎𝑛 between 3( 2)^1/2 𝑉𝐿/ 𝜋 and −3 ( 2)^1/2 𝑉𝐿/ 𝜋 . Frequency of superimposed ripple in 𝑉 𝑜 is = 6 𝑓 𝑠 ⫽

Fundamental component of input line current 𝐼𝑎 waveform is 𝛼 angle shifted forward, relative to the case of diode-bridge. ∴ Input Displacement angle = 𝛼 ⫽ Input Displacement Factor (DisF) = cos𝛼 ⫽

When 𝛼 is varied, Peak reverse voltage blocked by a thyristor= 2𝑉𝐿 ⫽ Peak forward voltage blocked by a thyristor = 2𝑉𝐿 ⫽

Ex: Sketch Vo waveform for α = 90° and α = 150°.

Output voltage waveform for α = 90°

Output voltage waveform for α = 150°

The ac to dc inverter with suitable examples and sketches are discuss here advanced. ac to dc inverter is needed to read as engineer student.

### 3-phase full-bridge with inductive load (With source inductance)

The ac to dc power converter with suitable examples and sketches are discuss here advanced. ac to dc power converter is needed to read as engineer student.

a, b, c are supply side poles

A, B, C are converter-input poles

Ls is supply internal inductance per phase

Io is continuous

Input currents 𝐼𝑎,𝐼𝑏,𝐼𝑐 cannot make step changes at the points of commutation due to the presence of 𝐿𝑠. Current changes taking a brief time during which both the outgoing thyristor and the incoming thyristor conduct simultaneously, creating conduction overlap.

Phase-angle width of conduction overlap is “conduction overlap angle”, denoted by “u”. During the brief conduction overlap, the newly triggered thyristor and two already conducting thyristors conduct simultaneously.

During overlap, three recently triggered thyristors conduct. Outside overlap, two recently triggered thyristors conduct.

Waveforms of output-voltage (𝑉 𝑜), Input current (𝐼𝑎), Thyristor-voltage (𝑉1) and Line-line voltage (𝑉𝐴𝐵) at the PCC

Outside the conduction overlaps, 𝑉 𝑜is not influenced by source inductance 𝐿𝑠, because input currents are constant at 𝐼𝑜 or 0. We want to identify 𝑉 𝑜 during overlaps, and derive an expression for conduction overlap angle 𝑢. Let consider the conduction overlap following the triggering of 𝑇1. During this overlap 𝑇5,𝑇6,𝑇1 conduct simultaneously.

If we look carefully, 𝑉𝑐𝑏is the output voltage before the overlap, and 𝑉𝑎𝑏is the output voltage after the overlap. In general, we can state that “during an overlap, the output voltage takes the mean between “pre-overlap 𝑉 𝑜 if continued through the overlap and the post-overlap 𝑉 𝑜 if advanced to the beginning of overlap

Reduction of Volt-radian area from 𝑉 𝑜 due to the conduction overlap is,

Waveform of Voltage 𝑉1across thyristor 𝑇1 indicates frequent step changes, which apply high 𝑑𝑉 𝑑𝑡 stress on the thyristor. Therefore proper 𝑑𝑉 𝑑𝑡 protection using RC-snubber circuits is very important. Otherwise, inadvertent triggering can occur, causing serious fault conditions.

Line-line voltage at the point of common coupling (PCC) contains 6 nos. of notches per cycle. Four of these notches are shallow notches (of volt-radian area 𝜔𝐿𝑠𝐼𝑜) and two are deep notches (of volt-radian area 2𝜔𝐿𝑠𝐼𝑜 ). Deep-notches occur at angle 𝛼 away from zero crossing points of the line-voltage, with a depth of 2𝑉𝐿 sin 𝛼 + 𝑢 2 . The six notches are 60° spaced, each of width 𝑢

During overlaps, voltage 𝑉𝐴𝐵is related to 𝑉 𝑜according to KVL. Outside overlaps, 𝑉𝐴𝐵is equal to supply voltage 𝑉𝑎𝑏.

𝑉𝐴𝐵 =

𝑉𝑎𝑏 outside overlaps 𝑉 𝑜 during overlap after 𝑇1 where 5,6,1 conduct 𝑉 𝑜 during overlap after 𝑇2 where 6,1,2 conduct 0 during overlap after 𝑇3 where 1,2,3 conduct −𝑉 𝑜 during overlap after 𝑇4 where 2,3,4 conduct −𝑉 𝑜 during overlap after 𝑇5 where 3,4,5 conduct 0 during overlap after 𝑇6 where 4,5,6 conduct

Notches in the voltage at PCC are undesirable. In particular, two deep notches which touch zero-volt are highly undesirable. In practice, we use separate inductors at the converter input to reduce the depth of all notches by a factor, as required.

Depth of voltage notch with converter inductance =

𝐿𝑠 𝐿𝑐 +𝐿𝑠

Depth of voltage notch without converter inductance

Ex:

Three-phase, full-bridge thyristor converter is operating on 50 Hz, 400 V threephase supply, that has an internal inductance 2 mH per phase. The converter delivers 20 kW of power to an inductive load at a mean DC voltage of 380 V. Load current can be assumed to be constant. Determine, (i) Delay angle (ii) Conduction overlap angle (iii) Input Displacement Factor (iv) RMS value of the fundamental component of input current (v) Input inductance per phase required to reduce depth of notches of the line voltage at the PCC by 60%.

### 3-phase full-bridge with Regenerative load (With source inductance)

The ac to dc power supply with suitable examples and sketches are discuss here advanced. ac to dc power supply is needed to read as engineer student.

For loads with negative EMF, we can operate the converter as an inverter by making 𝛼 > 90°. Then real power flows from the load back to the AC supply. This is identified as a load commutated inverter (LCI)

Waveforms of output voltage and thyristor-1 voltage

For successful operation, • Each incoming thyristor should be on forward-bias at the point of triggering. • Each outgoing thyristor should immediately be under reverse-bias for a brief phase angle width, as determined by thyristor-turn-off time .

First condition is normally satisfy without difficulties. Always the conducting thyristor (in a given half) creates a forward bias across the next in line at the point of triggering. For example, conducting T5 creates a forward bias across T1 at triggering of T1. Second condition, however, should be guarante by restricting the maximum delay angle below 180°. Then the outgoing thyristor will be subject to reverse bias over a brief phase-angle slot. If this slot is wider than the “turn-off angle” specified for the particular thyristor, the commutation will be successful.

For example, in the waveforms, outgoing T1 is subject to reverse bias for a phase angle span γ.

𝛾 = Extinction angle 𝛾 = 180°− 𝛼 +𝑢 If 𝛾 is greater than the “turn-off-angle”, the commutation will be successful. In general, about a 15° allocation for extinction angle is a reasonable choice, which for 50 Hz AC operation amounts to about 0.8 ms reservation (thyristor turn off times are much shorter than 0.8 ms).

Ex:

A three-phase thyristor full-bridge is operating on 400 V, 50 Hz three-phase AC supply that has internal inductance 2 mH per phase. Thyristors used in the bridge needs a reservation of 500 μs for the turn-off time. Determine, (i) Minimum extinction angle required (ii) Peak real power that can be returned back to the AC source at a time when the converter is delivering 30 A current to an inductive load.

Greatest reversal of power occurs when the delay angle is changed stepwise to cause the highest acceptable reverse voltage at the load, because current 𝐼𝑜is still continuing due to load inductance.

𝑃𝑚𝑎𝑥 𝑟𝑒𝑔𝑒𝑛 = 512.2×30 W = 15336 W⫽

The AC to DC converter with suitable examples and sketches are discuss here advanced. AC to DC converter is needed to read as engineer student.

## Semi-controlled Converters

Semi-controlled converter is a hybrid between uncontrolled and fullycontrolled converters. It is also known as “semi-converter”.

Semi-converter offers variable positive DC output voltage only. Regeneration or inverter mode operation is not available

## Three-phase Semi-converter with inductive load (With source side inductance)

Each thyristor-to-thyristor commutation involves with a conduction overlap angle 𝑢𝑇, and each diode-to-diode commutation involves with a conduction overlap angle 𝑢𝐷. Here too, during overlap, the three recently active devices conduct simultaneously and outside overlaps the two recently active devices conduct simultaneously.

Waveforms of output voltage, input current, thyristor-1 voltage and voltage at PCC

Let consider the thyristor-overlap after triggering 𝑇1, during which 𝑇1,𝐷6,𝑇5 conduct simultaneously. Following the same steps followed in the case of full-bridge before, we can show that,

Similarly, let consider the diode-overlap after 𝐷2 becoming forward biased, during which 𝐷2,𝑇1,𝐷6 conduct simultaneously. Again, following the same steps as in thyristor-overlap, we can show,

Net reduction in 𝑉 𝑜 𝑚𝑒𝑎𝑛 due to conduction overlaps is,

As in the case without source-inductance, operating waveforms will be different depending on whether 𝛼 is below or above 60°. For 𝛼 > 60°, 𝑉 𝑜 has only 3 ripples per AC cycle. During every overlap 𝑉 𝑜 = 0 Line voltage at the PCC contains 2 notches only, both are down to zero. However, expressions for 𝑉 𝑜 𝑚𝑒𝑎𝑛 , ∆𝑉 𝑜, 𝐷𝑖𝑠𝐹, 𝑢𝑇, 𝑢𝐷 all remain unchanged.

Waveforms of output voltage, input current, thyristor-1 voltage and voltage at PCC for α > 60°

Ex:

Derive expressions for ∆𝑉 𝑜,𝑢𝑇 and 𝑢𝐷 for a three-phase semi-converter operating at a delay angle above 60°. Hence verify that they are same as for delay angles below 60°.

Ans

Let consider the overlap after triggering 𝑇1. With respect to operating waveforms given before, 𝑇1,𝐷2,𝑇5 all conduct simultaneously during this interval.

Net reduction of 𝑉 𝑜 𝑚𝑒𝑎𝑛 occurs due to thyristor-overlaps only, because diode overlaps are occurring while 𝑉 𝑜 is already zero.

Considering diode overlap after 𝐷4 becoming forward biased, during which 𝐷4, 𝑇1, 𝐷2 all conduct simultaneously,

Integrating,

Thus, the expressions of ∆𝑉 𝑜,𝑢𝑇 and 𝑢𝐷 for 𝛼 > 60° are same as those for 𝛼 < 60°.

## Semi-controlled Converters – AC to DC converter

Semi-controlled converter is a hybrid between uncontrolled and fullycontrolled converters. It is also known as “semi-converter”.

Semi-converter offers variable positive DC output voltage only. Regeneration or inverter mode operation is not available

## Single-phase Semi-converter with inductive load

In a semi-converter, thyristor conduction is delayed by angle α but diode conduction begins at their default points (i.e. zero delay-angle). For continuous load current (which we assumed), at any time, a thyristor from the upper-half and a diode from the lower-half must conduct the load current 𝐼𝑜, i.e. last two active devices conduct at any point of time.

By varying 𝛼 over 0° to 180°, we can adjust 𝑉 𝑜 𝑚𝑒𝑎𝑛 between 8𝑉𝑝 𝜋 and 0.

In 𝐼𝑠waveform, front-end of current pulse (in each half-cycle) is moved to the right by 𝛼 but rear-end is fixed. For a given delay angle 𝛼, the width of current pulse is 𝜋 −𝛼 .

Note: We assumed continuous load current for all delay angles. In reality, at higher delay-angles, load current becomes discontinuous. Then the input current will be different.

There are some other implementations of the single-phase semi-converter, all offering the same input-output performances.

Standard Implementation

Alternative Implementation – 1

Alternative Implementation – 2

Alternative Implementation – 3

Which implementation we want to select is partly our own preference and partly technical /operational requirements.

Thyristors (also diodes) are available as individual devices or multiple devices. Twin devices are available in common-cathode, common-anode or bridgedleg options. Selection of the converter configuration may depend on the type of available devices.

Technically, common-cathode configuration of standard implementation eases the assembly of two gate drive circuits sharing the cathodes. Threeleg implementation gives the choice between semi-converter and fullconverter during operation by making diode D5 in or out.

Self Attempt:

Draw the output voltage and input current waveforms for the other three configurations of 1-phase semi-converter, and indicate the devices conducting in different intervals of the cycle.

## Single-phase Semi-converter with inductive load (With Source Inductance)

Inductance Ls does not allow current Is to make step changes at T-to-T and D-to-D commutation points. Current changes taking a brief time. During these brief intervals both the incoming and the outgoing devices conduct simultaneously. This is a conduction overlap. Conduction overlap angle for thyristor commutation and diode commutation are different, because they occur at different points of Vs.

𝑢𝑇 = Thyristor conduction overlap angle 𝑢𝐷 = Diode conduction overlap angle Diode conduction overlap does not influence output voltage, because it occurs during 𝑉 𝑜 is zero. However it affects the voltage waveform at the PCC.

Let consider the conduction overlap after triggering 𝑇1. During this interval 𝑇1,𝐷2,𝑇3 all conduct simultaneously, short-circuiting the load, as well as the source.

Reduction of volt-radian area (A) from 𝑉 𝑜 due to the conduction overlap,

Reduction in 𝑉 𝑜 𝑚𝑒𝑎𝑛 due to conduction overlap,

Similarly, let consider conduction overlap at 𝐷4 taking up conduction. During this interval 𝐷4,𝐷2,𝑇1 conduct, short circuits the load, as well as the source. Load voltage during this interval is zero, anyway.

## Three-phase Semi-converter with inductive load

Diodes in the lower-half conduct at default forward-bias points. Thyristor conduction is delayed by delay angle α. It is assumed that load current is approximately constant due to load inductance.

The assumption that load current is continuous and constant is quite valid when the delay angle is not large. For larger delay angles in semiconverters, load current can become discontinuous, in which case the operating waveforms will be somewhat different.

Output voltage, input current and thyristor-1 voltage waveforms

At any point of time, the two previously active devices conduct and pass the corresponding line-voltage to the output.

𝑉 𝑜 𝑚𝑒𝑎𝑛 is variable but positive only for the 0° to 180° range of α.

With respect to the case of three-phase diode converter, the input current waveform’s positive half-cycle is shifted to the right by angle α but the negative halfcycle remains un-shifted.

Mathematically,

Order of harmonics in 𝐼𝑠 is = 5, 7, 11, 13, …..= 6𝑘 ±1 ,𝑘 = 1,2,3…

From a qualitative view point too, we can deduce input displacement angle. If positive half-cycle only shifts to the right by angle 𝛼, the fundamental component will be shifted to the right by angle 𝛼 2.

Once 𝐷𝑖𝑠𝐹 is known, 𝐼𝑠,𝐹𝑢𝑛𝑑 𝑟𝑚𝑠 can be found by equating input and output power too.

Operating waveforms of three-phase semi-converter will be different depending on whether 𝛼 is below or above 60°. For example, below 60°, 𝑉 𝑜 has 6 ripples per AC cycle but above 60°, 𝑉 𝑜 has only 3 ripples per AC cycle. However, the expressions of the 𝑉 𝑜 𝑚𝑒𝑎𝑛 , 𝐷𝑖𝑠𝐹Operating waveforms of three-phase semi-converter will be different depending on whether 𝛼 is below or above 60°. For example, below 60°, 𝑉 𝑜 has 6 ripples per AC cycle but above 60°, 𝑉 𝑜 has only 3 ripples per AC cycle. However, the expressions of the 𝑉 𝑜 𝑚𝑒𝑎𝑛 , 𝐷𝑖𝑠𝐹 and (Is,Fund)rms are valid for all values of α.

Operating waveforms for α = 60°

Operating waveforms for α > 60°

## Three-phase Semi-converter with inductive load (With source side inductance)

Each thyristor-to-thyristor commutation involves with a conduction overlap angle 𝑢𝑇, and each diode-to-diode commutation involves with a conduction overlap angle 𝑢𝐷. Here too, during overlap, the three recently active devices conduct simultaneously and outside overlaps the two recently active devices conduct simultaneously.

Waveforms of output voltage, input current, thyristor-1 voltage and voltage at PCC

Let consider the thyristor-overlap after triggering 𝑇1, during which 𝑇1,𝐷6,𝑇5 conduct simultaneously. Following the same steps followed in the case of full-bridge before, we can show that,

Similarly, let consider the diode-overlap after 𝐷2 becoming forward biased, during which 𝐷2,𝑇1,𝐷6 conduct simultaneously. Again, following the same steps as in thyristor-overlap, we can show,

Net reduction in 𝑉 𝑜 𝑚𝑒𝑎𝑛 due to conduction overlaps is,

As in the case without source-inductance, operating waveforms will be different depending on whether 𝛼 is below or above 60°. For 𝛼 > 60°, 𝑉 𝑜 has only 3 ripples per AC cycle. During every overlap 𝑉 𝑜 = 0 Line voltage at the PCC contains 2 notches only, both are down to zero. However, expressions for 𝑉 𝑜 𝑚𝑒𝑎𝑛 , ∆𝑉 𝑜, 𝐷𝑖𝑠𝐹, 𝑢𝑇, 𝑢𝐷 all remain unchanged.

Waveforms of output voltage, input current, thyristor-1 voltage and voltage at PCC for α > 60°

## Example AC to DC converter

Derive expressions for ∆𝑉 𝑜,𝑢𝑇 and 𝑢𝐷 for a three-phase semi-converter operating at a delay angle above 60°. Hence verify that they are same as for delay angles below 60°.

Ans

Let consider the overlap after triggering 𝑇1. With respect to operating waveforms given before, 𝑇1,𝐷2,𝑇5 all conduct simultaneously during this interval.

Net reduction of 𝑉 𝑜 𝑚𝑒𝑎𝑛 occurs due to thyristor-overlaps only, because diode overlaps are occurring while 𝑉 𝑜 is already zero.

Considering diode overlap after 𝐷4 becoming forward biased, during which 𝐷4, 𝑇1, 𝐷2 all conduct simultaneously,

Integrating,

Thus, the expressions of ∆𝑉 𝑜,𝑢𝑇 and 𝑢𝐷 for 𝛼 > 60° are same as those for 𝛼 < 60°.

## Dual full bridge Converters – AC to DC converter

Dual full-bridge converter uses two nos. of full-bridge converters in series or parallel. These converters are called “12-pulse converters” because there are 12 thyristors, each requiring a separate trigger pulses.

Series-converter gives a higher output voltage and the parallel converter gives higher output current. Per unit voltage-ripple at the output is lesser for both types.

Dual converter produces an input current having 12-steps, bringing it more towards the sinusoidal shape. So, THD of input current is lesser. Because of these reasons, most high power converters prefer dual-bridge arrangement.

### 3-phase dual series-bridge converter with inductive load

Dual series converter gives higher DC voltage output with still higher ripple frequency. Two full-bridges are supplied with three-phase voltages of same RMS value but 30° phase-shift in between. High power applications, eg: HVDC, prefer this converter.

In general, dual series converter gives, Higher DC voltage output Higher ripple-frequency in output voltage Lesser THD at the supply side AC current

Required 2-sets of three-phase voltages with 30° phase-shift in between is obtained using a single 3-winding transformer (or two separate transformers). The same transformer does the current addition to result in a low THD in the net input current.

Turn-ratio of the Ddy transformer should be 𝑁1:𝑁2:𝑁3 ≡ 1:𝑚:𝑚 3 to give equal voltage to two bridges. Value of 𝑚 is decided according to the utility voltage and the required converter voltage. Vector connection Dd0y1 gives necessary phase-shift, i.e. bridge-2 voltage 30° leading ahead of bridge-1 voltage.

To operate dual-bridge we can select one of two alternative controls. • Concurrent control • Sequential control

(i) Concurrent Control of dual series-bridges

This is a popular mode of control. Here, both bridges are operated at the same delay-angle, i.e. α1 = α2. Then,

𝑉𝑜2and 𝑉𝑜1of individual bridges each has 6 ripples per AC cycle. The net output 𝑉 𝑜 has 12 ripples per AC cycle. This doubled ripple frequency is beneficial for reducing the size of filter components at output and input, both.

Adding up of bridge output voltages to give the net output voltage

Using Ampere’s Law, we can easily show that Input current at the utility side is given by,

Currents 𝐼𝑎 2, 𝐼𝑎 1 and 𝐼𝑏 1 are quasi-square currents having 120°wide single pulse in each half-cycle. 𝐼𝑎 2 is 30° leading ahead of 𝐼𝑎 1because bridge-2 voltage is 30°leading ahead of bridge-1. 𝐼𝑏 1 is 120° lagging behind 𝐼𝑎 1 as usual.

Utility side input current waveform has significantly improved in the form of a stepped sinusoidal waveform. Using Fourier expansion,

Orders of harmonics present at input current are 12𝑘 ±1 , where 𝑘 = 1,2,3,4,……

Contributions to 𝐼𝐴 𝐹𝑢𝑛𝑑 by bridge-2 and bridge-1 can be given separately, with respect to waveforms of 𝐼𝑎 2, 𝐼𝑎 1 and 𝐼𝑏 1. Contribution from bridge-2 is 𝑚 𝐼𝑎 2 and that from bridge-1 is 𝑚 3 𝐼𝑎 1 − 𝐼𝑏 1 . Mathematically, both contributions are equal and inphase, and angle 𝛼 lagging behind utility phase-A voltage.

Taking input phase-voltage as 𝑉𝐴 = 𝑉𝑚 sin𝜔𝑡, and using Fourier expansion,

Order of harmonics in IA 𝑖𝑠 = 12𝑘 ±1 , 𝑘 = 1,2,3,4,….⫽ Input Displacement Angle = 𝛼 ⫽ Input 𝐷𝑖𝑠𝐹 = cos𝛼 ⫽

### Sequential Control of dual series-bridges

1. mode-1, where α2 = 0° and α1 is varied from 0° to 180°.

2. mode-2, where α1 = 180° and α2 is varied from 0° to 180°

Sub-mode 1 gives variable positive voltage and sub-mode 2 gives variable negative voltage. With this control, the displacement-factor at the input gets improved but THD tends to get deteriorated.

### Sub-mode 1 : Sequential Control of dual series-bridges

Let take 𝐼1′ and 𝐼2′ be components of input line-current at utility end, produced by bridge-1 and bridge-2, respectively.

According to operation of Dd0y1 transformer and full-bridge converters, 𝐼2′ is inphase with input voltage (because 𝛼2 = 0) and 𝐼1′ is 𝛼1lagging behind input voltage (because of 𝛼1).

Let

Thus input current 𝐼𝐴 contains harmonics of order 6𝑘 ± 1 , where k = 1, 2, 3, 4, ….⫽

### Sub-mode 2 : Sequential Control of dual series-bridges

𝐼2′ is 𝛼2lagging behind input voltage (because of 𝛼2) and 𝐼1′is out of phase with input voltage (because 𝛼1 = 180°).

Thus input current 𝐼𝐴 contains harmonics of order 6𝑘 ± 1 , where k = 1, 2, 3, 4, ….⫽

Variation of (IA)Fund and its Displacement angle for different delay angles in the concurrent and sequential control. (VA is phase-A voltage at Utility)

With respect to this diagram of fundamental current, too, we can identify the operational parameters for the dual series converter, as given below.

For sequential control Mode-1:

For sequential control Mode-2:

For concurrent control:

### Example – AC to DC converter

Three-phase, dual series-bridge thyristor converter is operating on 400 V, 50 Hz utility three-phase supply via 400V/350V/350V, Dd0y1, three-phase transformer. The converter delivers 16 kW at 800 V to an inductive load. Converter is operated with concurrent control. Ignore supply internal inductance and transformer leakage inductances. Determine, (i) Delay angles for the two bridges (ii) Displacement Factor at utility input (iii) RMS value of the fundamental current supplied by the utility (iv) RMS values of the two lowest order harmonics present in the utility input current. If the converter is operated in sequential control, how the values in (I) to (iii) above would be modified.

Ans: 𝑉𝐿 = 350 𝑉 𝑓 𝑠 = 50 𝐻𝑧 𝑉 𝑜 𝑚𝑒𝑎𝑛 = 800 𝑉 𝑃 𝑜 = 16 𝑘𝑊 𝑚 = 350 400 = 0.875 𝐷𝑑0𝑦1 normal connection

### 3-phase dual parallel-bridge converter with inductive load

### (i) Dual Ordinary Parallel Converter – AC to DC converter

Two bridges are operated concurrently with 𝛼1 = 𝛼2 = 𝛼. The center-tapped inductor absorbs the instantaneous voltage difference between 𝑉𝑜1 and 𝑉𝑜2. In general, dual parallel converter gives, Higher DC current output Higher ripple-frequency in output voltage Lesser THD at the supply side AC current

Mean inductor-voltage is zero and hence,

Ripple in 𝑉 𝑜 has a frequency of 12𝑓 𝑠 as in the series converter. Amplitude of ripple is 50% of that produced by an individual bridge. Both are desirable outcomes.

𝐼𝑜 = 𝐼𝑜1 +𝐼𝑜2

Thus, output current is greater. Input current 𝐼𝐴 at the utility side is a stepped sine waveform as in the series converter, having only 12𝑘 ±1 𝑡 order of harmonics, where 𝑘 = 1,2,3…. (assuming equal current sharing).

- Dual Inverse Parallel Converter

An alternative version of dual parallel converter is obtained when the two bridges are connected in inverse parallel. In this case, we can give either positive or negative 𝐼𝑜 by making 𝐼𝑜2 greater or lesser than 𝐼𝑜1, respectively. So, the load can absorb or regenerate real power, offering true 4-quadrant operation.

Since the mean voltage across the inductor is zero, using KVL,

𝑉𝑜2 𝑚𝑒𝑎𝑛 + 𝑉𝑜1 𝑚𝑒𝑎𝑛 = 0

This means the dual inverse-parallel converter should be operated complying the condition 𝛼2 +𝛼1 = 180°.

In the steady state,

𝑉 𝑜 𝑚𝑒𝑎𝑛 is positive when 𝛼2 < 90° or negative when 𝛼2 > 90°. (𝛼1 is determined by 𝛼2). 𝐼𝑜 is determined by the load but set by the relative values of 𝐼𝑜2 and 𝐼𝑜1. It is positive when 𝐼𝑜2 > 𝐼𝑜1 or negative when 𝐼𝑜2 < 𝐼𝑜1 or zero when 𝐼𝑜2 = 𝐼𝑜1.

The load can either consume or regenerate real power depending on the product 𝑉 𝑜 𝑚𝑒𝑎𝑛𝐼𝑜. Positive product means consuming, negative product means regenerating or zero product means idling.

Contributions to the fundamental component of 𝐼𝐴 at utility side by bridge-2 and bridge-1, assuming utility phase-A voltage as 𝑉𝐴 = 𝑉𝑚 sin𝜔𝑡, are:

Using this expression of 𝐼𝐴,𝐹𝑢𝑛𝑑 , we can determine the input Displacement Angle and input DisF. For example, when 𝐼𝑜2 = 𝐼𝑜1, 𝐼𝐴,𝐹𝑢𝑛𝑑 is 90° lagging behind 𝑉𝐴, indicating zero DisF.

We can show,

## Assignment: AC to DC converter

Drive mathematical expressions for 𝑉 𝑜 𝑚𝑒𝑎𝑛 , 𝐷𝑖𝑠𝐹 and associated 𝑢𝑇s for the following dual full-bridge thyristor converters. Take a Dd0y1 three-phase transformer to feed two bridges with bridge-2 connected to d-winding and bridge-1 to y-winding. Each output of the transformer is having equal rms line-voltage 𝑉𝐿 . Net internal inductance on d-winding is 𝐿𝑠2 and that on y-winding is 𝐿𝑠1. Delay angles for bridge-2 and bridge-1 are 𝛼2 and 𝛼1, respectively.

(i) Dual series-bridge converter with constant load current 𝐼𝑜 with concurrent control.

(ii) Dual series-bridge converter with constant load current 𝐼𝑜 with sequential sub-mode 1 control.

(iii) Dual series-bridge converter with constant load current 𝐼𝑜 with sequential sub-mode 2 control (inverter mode operation).

(iv) Dual parallel-bridge converter with constant load current 𝐼𝑜 with concurrent control and equal sharing of current.

(v) Dual inverse-parallel-bridge converter with constant load current 𝐼𝑜 with bridge-2 current 𝐼𝑜2 and bridge-1 current 𝐼𝑜1.

You may use appropriate standard expressions for the relevant cases without internal inductances and modify them to account the effects of 𝐿𝑠2 and 𝐿𝑠2, giving reasons.