# Fully Controlled AC to DC Converters

The ac to dc conversion with suitable examples and sketches are discuss here advanced. ac to dc conversion is needed to read as engineer student.

## Single phase bridge with inductive load (With source inductance

Real AC sources have an internal impedance.Β  This is basically anΒ  βinternal inductanceβ, because internal resistance is often negligible. We denote this inductance as Ls per phase.

Full-bridge thyristor converter with inductive load, with source inductance.

Because of πΏπ , current πΌπ  at input cannot make step changes at switchover points between  π1,π2  and  π3,π4 .  Current changes take time.  During this brief interval of time, both the outgoing and incoming pairs of thyristors conduct simultaneously.  This is called a βconduction overlapβ.  The phase angle width of conduction overlap is called βconduction overlap angleβ.

Conduction overlap angle is denoted by π’.

Waveforms of output voltage  π π , Input current   πΌπ   and Converter input voltage   ππ΄π΅

During overlap, all 4 thyristors conduct simultaneously and hence π π = 0.   Let consider the overlap after triggering  π1,π2 pair. Using KVL,

Reduction  βπ π of mean output voltage due to conduction overlap is,

Input DisF gets deteriorated when the delay angle is increased.  This is a drawback of fully-controlled thyristor converters

Supply voltage VAB at the point of common coupling (PCC) is distorted with 2 notches per cycle, occurring at angle Ξ± from zero crossing.  These notches go down to zero volt, which is highly undesirable.  This is another drawback of thyristor converters.  Note that VAB is the input voltage for other loads connected to the PCC.

Depth of voltage notches can be reduced to an acceptable level by connecting an external inductor (Lc) at the converter input.  This avoids artificial zero-crossings in the voltage waveform.  Acceptable depth of notches are specified in power-quality standards.

(Depth of voltage notch with converter inductance) =  (πΏπ /( πΏπ +πΏπ )) X(Depth of voltage notch without converter inductance)

## Example ac to dc conversion

A single-phase full-bridge converter is operating on 230 V, 50 Hz singlephase supply that has an internal inductance 2 mH. The converter delivers 12 A constant current at a mean voltage of 120 V DC to an inductive load.  Determine,

• Operating delay angle
• Conduction overlap angle
• Input displacement-factor
• RMS value of the fundamental component of supply current
• Depth of voltage-notches at the point of common coupling (PCC)
• Required converter inductance to reduce the depth of notches down to 25% and its influence on the values found in (i) to (iv).

## 3-phase full-bridge with inductive load

Three-phase full-bridge thyristor converter with inductive load

Thyristor full-bridge operates quite similar to diode full-bridge but the turn-on points of thyristors are now delayed by angle Ξ±.  For continuous load current, one thyristor from the upper-half and other from the lowerhalf must conduct at any time.  Six line-line voltages at the input decide which pair should conduct at a given point of time.

Six line-line voltage waveforms at the converter input for a, b, c standard phase sequence

1. Upper-half thyristors bear ODD numbers and lower-half thyristors bear EVEN numbers.
2. Delay angle for a thyristor is measured from its βdiode-likeβ conduction point.
3. Triggering order of thyristors turns out to be 1, 2, 3, 4, 5, 6, 1, β¦β¦
4. Consecutive trigger-points are 60Β° apart.
5. Once triggered, a thyristor conducts for 120Β° span until the next thyristor in that half takes over.
6. Between trigger points, two previously triggered thyristors conduct πΌπ (they are in upper and lower halves).
7. The pair that conducts at a time passes the corresponding line voltage on to π π (eg:  π π β‘ ππ΄π΅ when (1, 6) pair conducts).

πΌπ =    πΌπ if π1 is conducting

βπΌπ if π4 is conducting

0 otherwise

π1 =   0   if π1 is conducting

ππ΄π΅ if π3 is conducting

ππ΄πΆ if π5 is conducting

Waveforms of Vo, Ia and V1 at an arbitrary delay angle Ξ±

By varying  πΌ between 0Β° to 180Β°, we can vary  ππππππ between 3( 2)^1/2 ππΏ/ π and β3 ( 2)^1/2 ππΏ/ π . Frequency of superimposed ripple in π π is = 6 π π  β«½

Fundamental component of input line current  πΌπ  waveform is  πΌ angle shifted forward, relative to the case of diode-bridge.   β΄ Input Displacement angle = πΌ β«½     Input Displacement Factor (DisF) = cosπΌ β«½

When  πΌ is varied, Peak reverse voltage blocked by a thyristor= 2ππΏ β«½  Peak forward voltage blocked by a thyristor =  2ππΏ β«½

## Example ac to dc conversion

Sketch Vo waveform for Ξ± = 90Β° and Ξ± = 150Β°.

Output voltage waveform for Ξ± = 90Β°

Output voltage waveform for Ξ± = 150Β°

The ac to dc conversion with suitable examples and sketches are discuss here advanced. ac to dc conversion is needed to read as engineer student.

## 3-phase full-bridge with inductive load (With source inductance)

a, b, c are supply side poles

A, B, C are converter-input poles

Ls is supply internal inductance per phase

Io is continuous

Input currents  πΌπ,πΌπ,πΌπ cannot make step changes at the points of commutation due to the presence of πΏπ .  Current changes taking a brief time during which both the outgoing thyristor and the incoming thyristor conduct simultaneously, creating conduction overlap.

Phase-angle width of conduction overlap is βconduction overlap angleβ, denoted by βuβ.  During the brief conduction overlap, the newly triggered thyristor and two already conducting thyristors conduct simultaneously.

During overlap, three recently triggered thyristors conduct. Outside overlap, two recently triggered thyristors conduct.

Waveforms of output-voltage (π π), Input current (πΌπ), Thyristor-voltage (π1) and Line-line voltage (ππ΄π΅) at the PCC

Outside the conduction overlaps, π πis not influenced by source inductance πΏπ , because input currents are constant at πΌπ or 0.  We want to identify π π during overlaps, and derive an expression for conduction overlap angle π’. Let consider the conduction overlap following the triggering of π1.  During this overlap  π5,π6,π1 conduct simultaneously.

If we look carefully, πππis the output voltage before the overlap, and πππis the output voltage after the overlap.  In general, we can state that βduring an overlap, the output voltage takes the mean between βpre-overlap π π if continued through the overlap and the post-overlap π π if advanced to the beginning of overlap

Reduction of Volt-radian area from π π due to the conduction overlap is,

Waveform of Voltage  π1across thyristor  π1 indicates frequent step changes, which apply high ππ ππ‘ stress on the thyristor.  Therefore proper ππ ππ‘ protection using RC-snubber circuits is very important.  Otherwise, inadvertent triggering can occur, causing serious fault conditions.

Line-line voltage at the point of common coupling (PCC) contains 6 nos. of notches per cycle.  Four of these notches are shallow notches (of volt-radian area ππΏπ πΌπ) and two are deep notches (of volt-radian area 2ππΏπ πΌπ ).  Deep-notches occur at angle πΌ away from zero crossing points of the line-voltage, with a depth of  2ππΏ sin πΌ + π’ 2 .  The six notches are 60Β° spaced, each of width π’

During overlaps, voltage ππ΄π΅is related to π πaccording to KVL. Outside overlaps, ππ΄π΅is equal to supply voltage πππ.

ππ΄π΅ =

πππ outside overlaps                                                       π π during overlap after π1 where 5,6,1 conduct π π during overlap after π2 where 6,1,2 conduct    0 during overlap after π3 where 1,2,3 conduct βπ π during overlap after π4 where 2,3,4 conduct βπ π during overlap after π5 where 3,4,5 conduct    0 during overlap after π6 where 4,5,6 conduct

Notches in the voltage at PCC are undesirable. In particular, two deep notches which touch zero-volt are highly undesirable. In practice, we use separate inductors at the converter input to reduce the depth of all notches by a factor, as required.

Depth of voltage notch with converter inductance =

πΏπ  πΏπ +πΏπ

Depth of voltage notch without converter inductance

## Example ac to dc conversion

Three-phase, full-bridge thyristor converter is operating on 50 Hz, 400 V threephase supply, that has an internal inductance 2 mH per phase.  The converter delivers 20 kW of power to an inductive load at a mean DC voltage of 380 V.  Load current can be assumed to be constant.    Determine, (i) Delay angle (ii) Conduction overlap angle (iii) Input Displacement Factor (iv) RMS value of the fundamental component of input current (v) Input inductance per phase required to reduce depth of notches of the line voltage at the PCC by 60%.

## 3-phase full-bridge with Regenerative load (With source inductance)

The ac to dc power supply with suitable examples and sketches are discuss here advanced. ac to dc power supply is needed to read as engineer student.

For loads with negative EMF, we can operate the converter as an inverter by making πΌ > 90Β°.  Then real power flows from the load back to the AC supply.  This is identified as a load commutated inverter (LCI)

Waveforms of output voltage and thyristor-1 voltage

For successful operation, β’ Each incoming thyristor should be on forward-bias at the point of triggering. β’ Each outgoing thyristor should immediately be under reverse-bias for a brief phase angle width, as determined by thyristor-turn-off time .

First condition is normally satisfied without difficulties. Always the conducting thyristor (in a given half) creates a forward bias across the next in line at the point of triggering.   For example, conducting T5 creates a forward bias across T1 at triggering of T1. Second condition, however, should be guaranteed by restricting the maximum delay angle below 180Β°.  Then the outgoing thyristor will be subjected to reverse bias over a brief phase-angle slot.  If this slot is wider than the βturn-off angleβ specified for the particular thyristor, the commutation will be successful.

For example, in the waveforms, outgoing T1 is subjected to reverse bias for a phase angle span Ξ³.

πΎ = Extinction angle πΎ = 180Β°β πΌ +π’  If πΎ is greater than the βturn-off-angleβ, the commutation will be successful.  In general, about a 15Β° allocation for extinction angle is a reasonable choice, which for 50 Hz AC operation amounts to about 0.8 ms reservation (thyristor turn off times are much shorter than 0.8 ms).

## Example ac to dc conversion

A three-phase thyristor full-bridge is operating on 400 V, 50 Hz three-phase AC supply that has internal inductance 2 mH per phase.  Thyristors used in the bridge needs a reservation of 500 ΞΌs for the turn-off time. Determine, (i) Minimum extinction angle required (ii) Peak real power that can be returned back to the AC source at a time when the converter is delivering 30 A current to an inductive load.

Greatest reversal of power occurs when the delay angle is changed stepwise to cause the highest acceptable reverse voltage at the load, because current πΌπis still continuing due to load inductance.

Β ππππ₯ πππππ = 512.2Γ30 W = 15336 Wβ«½

The ac to dc conversion with suitable examples and sketches are discuss here advanced. ac to dc conversion is needed to read as engineer student.

## Reference ac to dc conversion

1. Page ac to dc conversion
2. Page ac to dc conversion